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Google Skywater 130nm MPW-3 Quickstart
Published:
Giới thiệu
publications
Multi-level Design Methodology using SystemC and VHDL for JPEG Encoder
Published in In the proceedings of The 2011 International Conference on Integrated Circuits and Devices in Vietnam (IEICE ICDV 2011), 2011
ISBN: 978-4-88552-258-1
Recommended citation: Duy-Hieu Bui, Xuan-Tu Tran, "Multi-level Design Methodology using SystemC and VHDL for JPEG Encoder." In the proceedings of The 2011 International Conference on Integrated Circuits and Devices in Vietnam (IEICE ICDV 2011), 2011. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/47/
A Hardware Architecture for Intra Prediction in H.264/AVC Encoder
Published in In the proceedings of 2012 IEICE International Conference on Integrated Circuits and Devices in Vietnam (ICDV 2012), 2012
Recommended citation: Duy-Hieu Bui, Van Tran, Van Nguyen, Duc Ngo, Xuan-Tu Tran, "A Hardware Architecture for Intra Prediction in H.264/AVC Encoder." In the proceedings of 2012 IEICE International Conference on Integrated Circuits and Devices in Vietnam (ICDV 2012), 2012. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/41/
High-Performance Adaption of ARM Processor into Network-on-Chip Architectures
Published in In the proceedings of The 26th IEEE International System-on-Chip Conference (SOCC), 2013
Recommended citation: Tung Nguyen, Duy-Hieu Bui, Hai-Phong Phan, Trong-Trinh Dang, Xuan-Tu Tran, "High-Performance Adaption of ARM Processor into Network-on-Chip Architectures." In the proceedings of The 26th IEEE International System-on-Chip Conference (SOCC), 2013. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/169/
System-on-Chip Testbed for Validating the Hardware Design of H.264/AVC Encoder
Published in In the proceedings of REV: the 2013 National Conference on Electronics and Communications, 2013
Recommended citation: Hai-Phong Phan, Kiem-Hung Nguyen, Duy-Hieu Bui, Nam-Khanh Dang, Xuan-Tu Tran, "System-on-Chip Testbed for Validating the Hardware Design of H.264/AVC Encoder." In the proceedings of REV: the 2013 National Conference on Electronics and Communications, 2013. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/417/
An Overview of H.264 Hardware Encoder Architectures including Low-Power Features
Published in REV Journal on Electronics and Communications, 2014
Recommended citation: Ngoc Nguyen, Duy Bui, Nam Dang, Edith Beigne, Suzanne Lesecq, Pascal Vivet, Xuan Tran, "An Overview of H.264 Hardware Encoder Architectures including Low-Power Features." REV Journal on Electronics and Communications, 2014. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/425/
Xây dựng hệ thống mô phỏng và kiểm chứng cho bộ mã hoá tín hiệu video video H.264/AVC
Published in In the proceedings of REV-ECIT: National Conference on Electronics, Communications and Information Technology, 2014
Recommended citation: Duy-Hieu Bui, Nam-Khanh Dang, Ngoc-Mai Nguyen, Kiem-Hung Nguyen, Xuan-Tu Tran, "Xây dựng hệ thống mô phỏng và kiểm chứng cho bộ mã hoá tín hiệu video video H.264/AVC." In the proceedings of REV-ECIT: National Conference on Electronics, Communications and Information Technology, 2014. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/436/
A Low-Cost Implementation of Advance Encryption Standard
Published in In the proceedings of The 5th International Conference on Integrated Circuits, Design, and Verification (ICDV 2014), 2014
Recommended citation: Tien-Luan Vu, Van-Quy Quach, Duy-Hieu Bui, Xuan-Tu Tran, "A Low-Cost Implementation of Advance Encryption Standard." In the proceedings of The 5th International Conference on Integrated Circuits, Design, and Verification (ICDV 2014), 2014. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/431/
H.264/AVC Hardware Encoders and Low-Power Features
Published in In the proceedings of 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 2014
Recommended citation: Ngoc-Mai Nguyen, Edith Beigne, Suzanne Lesecq, Duy-Hieu Bui, Nam-Khanh Dang, Xuan-Tu Tran, "H.264/AVC Hardware Encoders and Low-Power Features." In the proceedings of 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 2014. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/430/
Reducing Temporal Redundancy in MJPEG using Zipfian Estimation Techniques
Published in In the proceedings of 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 2014
Outstanding Student Paper Award \& Travel Support Grant Award
Recommended citation: Ngoc-Sinh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran, "Reducing Temporal Redundancy in MJPEG using Zipfian Estimation Techniques." In the proceedings of 2014: the 12th of the biennial IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS 2014), 2014. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/426/
Ultra Low-Power and Low-Energy 32-bit Datapath AES Architecture for IoT Applications
Published in In the proceedings of The 2016 IEEE International Conference on Integrated Circuit Design and Technology, 2016
Recommended citation: Duy-Hieu Bui, Diego Puschini, Simone Bacles-Min, Edith Beigne, Xuan-Tu Tran, "Ultra Low-Power and Low-Energy 32-bit Datapath AES Architecture for IoT Applications." In the proceedings of The 2016 IEEE International Conference on Integrated Circuit Design and Technology, 2016. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/1511/
AES datapath optimization strategies for low-power low-energy multi-security-level Internet-of-Thing applications
Published in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017
Recommended citation: Duy Bui, Diego Puschini, Simone Bacles-Min, Edith Beigne, Xuan Tran, "AES datapath optimization strategies for low-power low-energy multi-security-level Internet-of-Thing applications." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2490/
?AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures
Published in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2017
Recommended citation: Xuan Tran, Tung Nguyen, Hai Phan, Duy Bui, "?AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2017. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2468/
Adaptive Architectures, Circuits and Technology Solutions for Future IoT Systems
Published in Journal of Low Power Electronics, 2017
Recommended citation: Marc Belleville, Anca Molnos, Gilles Sicard, Jean Christmann, Dominique Morche, Duy Bui, Diego Puschini, Suzanne Lesecq, Edith Beigne, "Adaptive Architectures, Circuits and Technology Solutions for Future IoT Systems." Journal of Low Power Electronics, 2017. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2967/
Efficient Binary Arithmetic Encoder for HEVCwith Multiple Bypass Bin Processing
Published in In the proceedings of The 7th International Conference on Integrated Circuits, Design, and Verification (ICDV), 2017
Recommended citation: Quang-Linh Nguyen, Dinh-Lam Tran, Duy-Hieu Bui, Duc-Tho Mai, Xuan-Tu Tran, "Efficient Binary Arithmetic Encoder for HEVCwith Multiple Bypass Bin Processing." In the proceedings of The 7th International Conference on Integrated Circuits, Design, and Verification (ICDV), 2017. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2745/
Accurate and Low Complex Cell Histogram Generation by Bypass the Gradient of Pixel Computation
Published in In the proceedings of The 4th NAFOSTED Conference on Information and Computer Science (NICS), 2017
Recommended citation: Huy-Hung Ho, Ngoc-Sinh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran, "Accurate and Low Complex Cell Histogram Generation by Bypass the Gradient of Pixel Computation." In the proceedings of The 4th NAFOSTED Conference on Information and Computer Science (NICS), 2017. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/2746/
An Efficient Hardware Implementation of Artificial Neural Network based on Stochastic Computing
Published in In the proceedings of 2018 The 5th NAFOSTED Conference on Information and Computer Science (NICS), 2018
Recommended citation: Duy-Anh Nguyen, Huy-Hung Ho, Duy-Hieu Bui, Xuan-Tu Tran, "An Efficient Hardware Implementation of Artificial Neural Network based on Stochastic Computing." In the proceedings of 2018 The 5th NAFOSTED Conference on Information and Computer Science (NICS), 2018. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/3114/
A Variable Precision Approach for Deep Neural Networks
Published in In the proceedings of International Conference on Advanced Technologies for Communications (ATC) 2019, 2019
Recommended citation: Xuan-Tuyen Tran, Duy-Anh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran, "A Variable Precision Approach for Deep Neural Networks." In the proceedings of International Conference on Advanced Technologies for Communications (ATC) 2019, 2019. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/3721/
An Efficient Event-driven Neuromorphic Architecture for Deep Spiking Neural Networks
Published in In the proceedings of 2019 32nd IEEE International System-on-Chip Conference (SOCC), 2019
Recommended citation: Duy-Anh Nguyen, Duy-Hieu Bui, Francesca Iacopi, Xuan-Tu Tran, "An Efficient Event-driven Neuromorphic Architecture for Deep Spiking Neural Networks." In the proceedings of 2019 32nd IEEE International System-on-Chip Conference (SOCC), 2019. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/3725/
A Novel Hardware Architecture for Human Detection using HOG-SVM Co-Optimization
Published in In the proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2019
Recommended citation: Ngo-Doanh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran, "A Novel Hardware Architecture for Human Detection using HOG-SVM Co-Optimization." In the proceedings of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2019. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/3723/
Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Error in Stationary Blocks
Published in EAI Transactions on Industrial Networks and Intelligent Systems, 2020
Recommended citation: Xuan Tran, Ngoc Nguyen, Duy Bui, Kiem Nguyen, Minh Pham, Cong Pham, "Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Error in Stationary Blocks." EAI Transactions on Industrial Networks and Intelligent Systems, 2020. https://eprints.uet.vnu.edu.vn/eprints/id/eprint/3113/
talks
Security Hardware and Hardware Security for Ultra-low-power IoT: New challenges & Opportunities
Published:
The Internet of Things (IoT) has been fostered by accelerated advancements in communication technologies, computation technologies, sensor technologies, artificial intelligence, cloud computing, and semiconductor technologies. During IoT’s operations, it may collect, transmit and process secret data, which raise security problems. Implementing security mechanisms for ultra-low-power and low-cost IoT devices is challenging because they are intended to be battery-based devices with limited power budget, limited computation, and small memory footprint. In this talk, we will summarize the current options to secure ultra-low-power IoT applications and present our work on cryptographic hardware for IoT and our hardware security evaluation framework based on power estimation tools. This talk also discusses future research directions for security for ultra-low-power IoT applications.
teaching
Computer Architecture
Undergraduate course, VNU University of Engineering and Technology, Faculty of Information Technology, 2019
Digital Design
Undergraduate course, VNU University of Engineering and Technology, Faculty of Electronics and Telecommunications, 2019